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Title : Column-Parallel ADC Archietctures Comparison
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Column-Parallel ADC Archietctures Comparison

Japanese IEICE Transactions on Electronics publishes Shoji Kawahito paper "Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations."

"The defined FoM are applied to surveyed data on CISs reported and the following conclusions are obtained:
- The performance of CISs should be evaluated with different metrics to high pixel-rate regions (∼> 1000MHz) from those to low or middle pixel-rate regions.
- The conventional FoM (commonly-used FoM) calculated by (noise) x (power) /(pixel-rate) is useful for observing entirely the trend of performance frontline of CISs.
- The FoM calculated by (noise)2 x (power) /(pixel-rate) which considers a model on thermal noise and digital system noise well explain the frontline technologies separately in low/middle and high pixel-rate regions.
- The FoM calculated by (noise) x (power)/ (intrascene dynamic range)/ (pixel-rate) well explains the effectiveness of the recently-reported techniques for extending dynamic range.
- The FoM calculated by (noise) x (power)/ (gray-scale range)/ (pixel-rate) is useful for evaluating the value of having high gray-scale resolution, and cyclic-based and deltasigma ADCs are on the frontline for high and low pixel-rate regions, respectively."

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