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Title : TechInsights Overviews Smartphone CIS Advances: Chip-stacking and Chip-to-chip Interconnect
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TechInsights Overviews Smartphone CIS Advances: Chip-stacking and Chip-to-chip Interconnect

TechInsights starts publishing a series of blog posts "The State-of-the-Art of Smartphone Imagers" based on Ray Fontaine presentation at IISW 2019 at the end of June. The first part talks about chip-stacking and chip-to-chip interconnect:

"A brief history of stacked smartphone imagers from three leaders is illustrated as follows. Sony launched its first stacked chips with dual TSVs and evolved to a single TSV structure. Its first generation 6 µm pitch Cu-Cu hybrid bonding is still in wide use however we’ve just documented in 2019 an evolution to 3.1 µm pitch Cu-Cu hybrid bonding in its 0.8 µm pixel generation sensor. To our knowledge this is the world record for imager Cu-Cu hybrid bonding pitch. OmniVision and foundry partners have produced butted TSV, single TSV and Cu-Cu direct hybrid bond interconnects. To our knowledge, TSMC holds the world record for imager single TSV pitch at 4.0 µm. W-filled TSVs are the preferred interconnect choice for Samsung stacked imagers and we’ve documented 5.0 µm TSVs in its stacked imagers."

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